Erdős Number

Despite being neither a mathematician nor a prolific author, I'm quite proud to have an Erdős number of four. For the less-nerdly among you, an Erdős number is the degrees-of-separation in authorship between the incredibly prolific late mathematician Paul Erdős and another individual. Similarly, my Turing number is seven and my Torvalds number is three.


Academic Papers

A Technology-Agnostic Simulation Environment (TASE) for Iterative Custom IC Design Across Processes • Oct 2009 • ICCD'09: Proceedings of the 2009 IEEE International Conference on Computer Design • [Link]

A designer's intent and knowledge about the critical issues and trade-offs underlying a custom circuit design are implicit in the simulations she sets up for design creation and verification. However, this knowledge is tightly conjoined with technology-specific features and decoupled from the final schematic in traditional design flows. As a result, this knowledge is easily lost when the technology specifics change. This paper presents a Technology Agnostic Simulation Environment (TASE), which is a tool that uses simulation templates to capture the designer's knowledge and separate it from the technologyspecific components of a simulation. TASE also allows the designer to form groups of related simulations and port them as a unit to a new technology. This allows an actual design schematic to remain tied to the analyses that illuminate the underlying trade-offs and design issues, unlike the case where schematics are ported alone. Giving the designer immediate access to the trade-offs, which are likely to change in new technologies, accelerates the re-design that often must accompany porting of complicated custom circuits. We demonstrate the usefulness of TASE by investigating Read and Write noise margins for a 6T SRAM in predictive technologies down to 16 nm.

Body Area Sensor Networks: Challenges and Opportunities • Jan 2009 • IEEE Computer • [Link]

Body area sensors can enable novel applications in and beyond healthcare, but research must address obstacles such as size, cost, compatibility, and perceived value before networks that use such sensors can become widespread.

Single-Ended Coding Techniques for Off-Chip Interconnects to Commodity Memory • Apr 2007 • DATE '07: Proceedings of the conference on Design, automation and test in Europe • [Link]

This paper introduces a class of single-ended coding schemes to reduce off-chip interconnect energy consumption. State-of-the-art codes for processor-memory off-chip interfaces require the transmitter and receiver (memory controller and memory) to collaborate using current and previously transmitted values to encode and decode data. Modern embedded systems, however, cannot afford to use such double-ended codes that require specialized memories to participate in the code. In contrast, a single-ended code enables the memory controller to encode data stored in memory and subsequently decode that data when it is retrieved, allowing the use of commodity memories. In this paper, single-ended codes are presented that assign limited-weight codewords using trace-based mapping techniques. Simulation results show that such codes can reduce the energy consumption of an uncoded off-chip interconnect by up to 42.5%.


Patents

System and Method for Simulation Visualization • [Link]

A disclosed method for simulation visualization may include determining initial conditions for a control logic component for modeling and simulating of a physical product or process. The method may also include determining initial conditions for a render engine for generating a visualization of outputs of the control logic component. The method may include initiating execution of the control logic component and the render engine in accordance with the determined initial conditions, and receiving, during a simulation, input from the control logic component in accordance with a predefined interface for simulation visualization. The received input may represent one or more outputs of the control logic component. The method may also include communicating the received input to the render engine in accordance with the predefined interface for visualization by the render engine.

Display-Integrated Infrared Emitter and Sensor Structures • [Link]

In one embodiment, an electronic display includes a first plurality of hexagon-shaped pixels and a second plurality of hexagon-shaped pixels that are coplanar with the first plurality of hexagon-shaped pixels. The first plurality of hexagon-shaped pixels each include an infrared (IR) emitter subpixel that is operable to emit IR light. The second plurality of hexagon-shaped pixels each include an IR detector subpixel that is operable to detect IR light. Each IR emitter subpixel and each IR detector subpixel includes an anode layer and a cathode layer. Each particular IR emitter subpixel includes an IR emissive layer located between the anode layer and the cathode layer of the particular IR emitter subpixel. Each particular IR detector subpixel includes an IR detector layer located between the anode layer and the cathode layer of the particular IR detector subpixel.

Three-Dimensional Electronics Distribution by Geodesic Faceting • [Link]

In one embodiment, a flexible circuit board includes a plurality of facet locations that each correspond to a particular one of a plurality of rigid sensor facets and a particular one of a plurality of rigid display facets. The flexible circuit board also includes a plurality of wire traces that serially connect the plurality of facet locations. The facet locations are arranged into a plurality of facet columns. When the flexible circuit board is flat, at least some of the facet locations are separated from one or more adjacent facet locations by a plurality of gaps. When the flexible circuit board is formed into a three-dimensional shape, the plurality of gaps are substantially eliminated, thereby permitting the plurality of rigid sensor facets to form a continuous sensing surface and the plurality of rigid display facets to form a continuous display surface.

Multi-Resolution Regionalized Data Transmission • [Link]

According to certain embodiments, reducing data signal bandwidth comprises receiving a multi-resolution image having a plurality of concentric regions that each have a different level of resolution, where the regions closer to the center having greater levels of resolution. Generating a representative image comprising first rasterizing the multi-resolution image into a pixel representation of pixel data with an array of pixel values. A ring of pixels for each region results from discarding duplicate pixels from each region such that only the interior pixels from each region are preserved. In a first circular direction, duplicate pixels along each ring are discarded, the preserved unique pixels resulting in ring fragments. The ring fragments are then moved towards the center so that there are no gaps between the ring fragments for each level of resolution. After resizing the array, discarded pixels are replaced with the pixel value from pixels in the second circular orientation with respect to their level of resolution.

Foveated Imaging System • [Link]

According to certain embodiments, an image system comprises a display and a controller. A portion of the display is capable of a first visual fidelity level which is the highest visual fidelity capability of the display. The controller is configured to determine a first location of a point on the display where the center of gaze of a user intersects the display and determine a plurality of concentric regions on the display sharing a common center determined at least in part on the first location of the point. The controller is further configured to communicate a command to the display to reduce the angular and spatial resolution of selected regions below the first visual fidelity level, the reduction in visual fidelity of each region determined at least in part on a proximity of each region from the first location of the point, such that the regions farther from the point have greater levels of reduction in visual fidelity.

Distributed Multi-Aperture Camera Array • [Link]

In one embodiment, an electronic camera assembly includes a circuit board and a plurality of sensor facets. Each sensor facet is coupled to a respective one of a plurality of facet locations on one side of the circuit board. Each sensor facet includes a plurality of sensor pixels. Each sensor facet can capture light at a plurality of capture resolutions. Each sensor facet includes a selectable capture resolution from the plurality of capture resolutions. Each sensor facet is individually addressable such that the plurality of sensor facets are configurable to provide heterogeneous capture resolutions. Each particular facet location is configured to transmit signals from a particular sensor facet that is electrically coupled to the particular facet location to a display, thereby displaying light on the display that corresponds to light captured at a particular selected capture resolution by the particular sensor facet.

Display Assemblies with Electronically Emulated Transparency • [Link]

In one embodiment, an electronic display assembly includes a circuit board, a first microlens layer on a first side of the circuit board, and a second microlens layer on an opposite side of the circuit board from the first microlens layer. The first microlens layer includes a first plurality of microlenses, and the second microlens layer includes a second plurality of microlenses. The electronic display assembly further includes an image sensor layer adjacent to the first microlens layer and a display layer adjacent to the second microlens array. The image sensor layer includes sensor pixels for detecting incoming light through the first microlenses, and the display layer includes display pixels for emitting light through the second microlenses. The electronic display assembly emulates transparency by emitting light from the second microlenses at angles that correspond to angles of the incoming light detected through the first microlenses.

Distributed Multi-Screen Array for High Density Display • [Link]

In one embodiment, an electronic display assembly includes a circuit board and a plurality of display facets. Each display facet is coupled to one side of the circuit board. Each display facet includes a plurality of display pixels. Each display facet includes a selectable display resolution from a plurality of display resolutions. Each display facet is individually addressable such that the plurality of display facets are configurable to provide heterogeneous display resolutions. The circuit board includes a plurality of facet locations. Each particular facet location is configured to transmit signals to a particular display facet that is electrically coupled to the particular facet location, thereby displaying light on the particular display facet at a particular selected display resolution.

Plenoptic Cellular Imaging System • [Link]

In one embodiment, an electronic display assembly includes a microlens layer and a pixel array layer. The microlens layer includes a plurality of cells. The pixel array layer is adjacent to the microlens layer. The pixel array layer includes a plurality of pixels. Each cell of the plurality of cells includes a transparent lenslet and one or both of: a plurality of opaque walls configured to prevent light from bleeding into adjacent cells; and a filter layer on one end of each cell of the plurality of cells. The filter layer is configured to limit light passing through the filter layer to a specific incident angle.

Plenoptic Cellular Vision Correction • [Link]

In one embodiment, an electronic display assembly includes a circuit board, a microlens layer, a pixel array layer, and a logic unit layer. The microlens layer includes cells that are arranged in a grid pattern that includes a center cell and a plurality of surrounding cells around the center cell. The pixel array layer includes a plurality of display pixels. The logic unit layer includes logic configured to display, using some of the plurality of display pixels, a sub-image in each particular cell of the first plurality of cells and to access vision correction parameters of a user. The logic is further configured to perform linear transformations on a plurality of the sub-images of the surrounding cells according to the vision correction parameters of the user and to shift the plurality of sub-images of the surrounding cells according to the linear transformations, thereby providing digital vision correction for the user.

In-Layer Signal Processing • [Link]

In one embodiment, an electronic display assembly includes a sensor array located on one side of a circuit board, an electronic display array located on an opposite side of the circuit board from the sensor array, and a logic unit layer coupled to one side of the circuit board. The logic unit layer is configured to receive first signals from the sensor array, perform at least one operation on the received first signals to create second signals, and transmit the second signals to the electronic display array. The first signals are communicated using a particular signal protocol and correspond to light captured by sensor pixels of the sensor array. The second signals are communicated using the particular signal protocol of the first signals and are operable to instruct the electronic display array to display light corresponding to the light captured by the plurality of sensor pixels.

Direct Camera-to-Display System • [Link]

In one embodiment, an electronic display assembly includes a sensor array located on one side of a circuit board and an electronic display array located on an opposite side of the circuit board from the sensor array. The sensor array includes a plurality of sensor pixel units. Each sensor pixel unit includes a plurality of sensor pixels. The electronic display array includes a plurality of display pixel units. Each display pixel unit includes a plurality of display pixels. Each particular one of the plurality of sensor pixel units is mapped to a corresponding one of the plurality of display pixel units such that display pixels of each particular one of the plurality of display pixel units display light corresponding to light captured by sensor pixels of its mapped sensor pixel unit.